IPC, JEDEC devise package strain test

12/15/2011

December 15, 2011 -- Grid-array packages -- ball grid arrays (BGA), land grid arrays (LGA), column grid arrays (CGA) -- are getting larger, and as such as susceptible to mechanical stresses from handling, assembly onto PCBs, and test procedures. IPC and JEDEC created “IPC/JEDEC-9707, Spherical Bend Test Method for Characterization of Board Level Interconnects” to help identify safe levels of strain on more complex packages.

“Spherical bend puts the most stress on a BGA's corner interconnects,” said Aileen Allen, a reliability engineer at Hewlett-Packard and member of the IPC 6-10d SMT Attachment Reliability Test Methods Task Group that led the effort to develop the standard.

The test methodology imposes a “worst-case bend mode” on a package to determine strain limits. It calls for eight points of contact arranged in a circular pattern. A PCB assembly (PCBA) with a single BGA in the center of the board is placed component side down onto the support pins, and load is applied on the backside of the BGA. Strain gauges are placed adjacent to the component per recommendations. The PCA is deflected to strain levels of interest, and failure analysis is performed to determine the degree of damage induced by flexing to these strain levels. An iterative approach is used to determine the strain at which no damage is incurred, which is the strain limit.

For more information or to purchase IPC/JEDEC-9707, visit www.ipc.org/9707.

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Volume 56, Issue 1

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